PS2 FASTNET: A Faster Network Path for the PlayStation 2 | Now, 12.2MB/s !

FASTNET
A Faster Network Path for the PlayStation 2

FASTNET is a dedicated high-speed receive path for moving Ethernet/IPv4/UDP traffic from a PC into EE memory through the PlayStation 2 network adapter.

It keeps Sony's DEV9/SMAP hardware ownership intact and specializes the receive delivery path for bulk DATA transfer.


Technical base

FASTNET is built on the SCE EENet architecture, the first-party path for the PS2 network hardware. SCE documentation defines EENet as an EE-side TCP/IP stack: `libeenet.a` contains the protocol stack body, while `ent_smap.a` and `ent_smap.irx` form the EE/IOP sides of the network adapter driver.

In this model, receive processing runs on the EE side, while DEV9/SMAP device control and link state remain on the IOP side.

FASTNET keeps this EE/IOP hardware split. DEV9/SMAP init, PHY/link state, descriptor ownership, DMA behavior, interrupt/recovery flow, and basic device ownership remain on the stock path.


Receive path

FASTNET redirects accepted RX frames into its own aggregation path before normal upper-layer delivery.

Code:
SMAP FIFO
-> stock ent_smap ownership / recovery
-> FASTNET IOP aggregation
-> ordered SIF DMA
-> EE ring publication
-> FASTNET DATA processing

The receive hook runs after the stock descriptor, frame length, MAC, and hardware-facing checks have accepted the frame.

The existing SMAP FIFO copy writes frame records into FASTNET aggregation memory. Protocol classification is done after the frame reaches the EE ring. FASTNET handles its own UDP DATA/control traffic directly; unrelated traffic is discarded.

The EE-side SMAP adapter remains available for interface state and the existing transmit path, including FASTNET replies.


IOP aggregation

FASTNET uses eight 32 KiB aggregation chunks.

Each stored record contains:

Code:
frame length
Ethernet frame
alignment padding

A chunk is queued when the next frame does not fit, when it reaches the DATA threshold, or when the idle seal releases short traffic.

The frame is copied from the SMAP FIFO into its final location inside the active chunk. Frame records are transferred to the EE in batches, reducing SIF requests, completion callbacks, and synchronization overhead.


SIF DMA and EE ring

Two DMA transfers can be active at the same time.

Each transfer uses one payload descriptor, or two when the EE ring wraps, followed by a commit descriptor.

Code:
payload DMA
-> commit DMA
-> records become visible to the EE

The EE consumes only committed records. After processing, the EE reports its read position so ring space and IOP chunks can be reused.

Non-wrapped records are parsed directly from the EE ring. Only records that wrap around the end of the ring use staging copy.


DATA format

The current FASTNET DATA path uses 1470-byte payload records.

Code:
UDP source port = transfer token
UDP payload     = packet index + DATA payload

The stream state tracks packet order and detects gaps during the receive test.


Retail measurement

The current FASTNET receive path was measured on retail PS2 hardware with fixed-size DATA stages. Each stage transfers 128,000,000 bytes of payload and reports received payload, packet count, gap count and result code from the PS2 side.

Latest fine sweep result:

Code:
target      payload rate   rc      gaps   received payload
12.2 MB/s   97.6 Mbps      0       0      128000000/128000000
12.3 MB/s   98.4 Mbps     -17      596    127123880/128000000

The 12.2 MB/s target completed cleanly with zero packet gaps. At this rate the DATA payload target is already 97.6 Mbps before Ethernet/IP/UDP framing overhead, so the test is operating in the practical upper region of a 100BASE-TX link.

The next step, 12.3 MB/s, reports packet gaps. This marks the first observed loss point in the current fine sweep.


Scope

FASTNET covers the network transport only. Disk access, file systems, and application-level protocols are outside this part of the project.

Requirements

* Windows 10 or Windows 11
* PowerShell 7 or newer
* Python 3
* PC and PS2 connected to the same local network
* UDP ports 31002 and 31003 allowed through the firewall

Default network addresses:

Code:
PC:  192.168.1.101
PS2: 192.168.1.102

Retail PS2

1. Extract the package.
2. Start the host script:

Code:
pwsh .\tools\run_ps2nbd_host_probe.ps1

3. Boot the EE ELF on the PS2:

Code:
out\ps2nbd_ee.elf

4. Wait for the FASTNET session to connect.
5. Use the interactive host console.

Useful commands

Code:
help              show available commands
hello             start or refresh FASTNET handshake
fnstatus          request FASTNET status from PS2
status            show host/session/stream status
eestream          run one DATA receive test
finesweep11mb     run 11.0-12.5 MB/s fine sweep
stop              stop active stream test
reset             reset current session
poweroff          request PS2 shutdown

Host logs are written under:

Code:
.tmp\host_probe

Trivia

As a small bonus, PS2NBD uses the original PlayStation 2 BIOS OSD font for its on-screen interface.

On a retail PS2, pressing the physical RESET button once performs a safe power-off sequence instead of an immediate reset.


PS2NBD — coming after FASTNET.
 

Attachments

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Oh man I would love to see about having this in my fork of wLE that supports every device
It's possible. It would just require enough time to integrate and test it properly without breaking wLE's existing device support.

The FASTNET preview/test build and its source code have now also been published and are available for testing and review.
 
Wait why not homebrew sdk?
It's not because PS2DEV is bad. For this project, the SCE SDK is simply the more appropriate baseline because the work is very close to the EE/IOP runtime, module ABI, SIF DMA, and Sony's network modules.

The SCE SDK provides the original interfaces, module contracts, tools, samples, and documentation for those parts of the system. PS2DEV is a very capable homebrew SDK, but it is still a community-built replacement rather than the original platform reference.

Using PS2DEV at this stage would mean dealing with SDK compatibility differences at the same time as the low-level implementation itself. Once FASTNET is complete and stable, a PS2DEV port can be handled separately and tested properly. ;)
 
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^ but that means no mmce/mx4sio/ata xfers

also does sce sdk have support for psx? especially dvr_hdd0 and xfrom?
 
^ but that means no mmce/mx4sio/ata xfers

also does sce sdk have support for psx? especially dvr_hdd0 and xfrom?
Those are separate from FASTNET.

MMCE, MX4SIO, XFROM and dvr_hdd0 are handled by their own wLE drivers, so porting FASTNET to PS2SDK would not remove support for them.

On the DESR side, FASTNET would only need to deal with the DEV9/SMAP network path. ATA also uses DEV9 resources, so that part needs to coexist properly, but the other devices are unrelated to the FASTNET port itself.

Both the SCE SDK and the PSX-DESR software stack are Sony implementations, so I would expect them to be compatible at the underlying IOP module, device and RPC level.

DESR-specific components such as xfromman, xfromserv, dvrdrv and dvrfile are not part of the generic PS2 module set, but they still follow Sony's own runtime and module conventions.
 
The netman implementation in ps2sdk can already group and DMA transfer multiple packets to the EE.
NETMAN can batch several frames into one SIF DMA request, but it still keeps a frame-by-frame workflow around that batch.

FASTNET uses the IOP mainly as a bridge between SMAP and EE memory. The IOP is also needed for ATAD, HDD access and other storage drivers, so the network path is kept as light as possible. Completed chunks are transferred instead of maintaining a full lifecycle for every frame, which reduces descriptor handling, DMA setup, cache work, buffer recycling and synchronization on the IOP. The heavier processing is left to the EE.

UDPBD follows the same idea of using a specialized path, but its final consumer is on the IOP, so it can transfer data directly into the block-device buffer without using SIF. FASTNET targets continuous delivery into EE memory instead.

The results also show the difference: NETMAN-based applications and related tests were generally around 4–5 MB/s, while UDPBD reached roughly 7–10 MB/s. FASTNET has sustained 11 MB/s with zero packet gaps.
 
*UPDATE* B144

FASTNET reached a clean 12.2 MB/s target stage in the current retail fine sweep.

Code:
12.2 MB/s  rc=0    gaps=0    data=128000000/128000000
 
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