PS2 Julian's various PS2 projects (Worklog)

The RDRAM binary in ROM of System 246 matches that of ps2-0160a-20011004.bin
The RDRAM binary in ROM of System 147 matches that of ps2-0200a-20040614.bin
The RDRAM binary in ROM of System 256 and System 148 is unique.

The KERNEL binary in ROM of System 246 is unique.
The KERNEL binary in ROM of System 147 is unique.
The KERNEL binary in ROM of System 256 and System 148 is unique.
 
A note about syscall 0x82 (_InitTLB):

For retail, TLB base end is 0xD, default size is 0x12 (18), and extended size is 0x8 (8).
For DESR, S256, and S148, TLB base end is 0xD, default size is 0x14 (20), and extended size is 0x9 (9).
For DTL-T, TLB base end is 0xD, default size is 0x18 (24), and extended size is 0xB (11).

For DESR, S256, S148, and DTL-T, when syscall 0x7e (MachineType) returns a value with bit 0x80 set, the values for retail apply.
 
sceCdReadSUBQ usage in OSDSYS appears to be used only for position information.

---

A tidbit: AnimePlay DVDs released by Hirameki require at least DVD Player 2.10 on PS2. Not sure what happens with older versions.
 
For TBR vector (note vector handlers are laid out in reverse order in memory from their index):
In DVRP firmware, the following is not stubbed:
* 0x00 Reset
* 0x07 No-coprocessor trap
* 0x08 Coprocessor error trap
* 0x0e Undefined instruction exception
* 0x10 External Interrupt 0
* 0x11 External Interrupt 1
* 0x12 External Interrupt 2
* 0x13 External Interrupt 3
* 0x14 External Interrupt 4
* 0x15 External Interrupt 5
* 0x16 External Interrupt 6
* 0x17 External Interrupt 7
* 0x18 Reload Timer 0
* 0x19 Reload Timer 1
* 0x1a Reload Timer 2
* 0x21 DMAC0 (end, error)
* 0x22 DMAC1 (end, error)
* 0x23 DMAC2 (end, error)
* 0x24 DMAC3 (end, error)
* 0x31 I2C I/F1
* 0x3f Delayed interrupt source bit
* 0x40 Reserved for system (used in REALOS)

In DVRP IPL, the following is not 0xFFFFFFFF:
* 0x00 Reset
* 0x01 Mode vector
* 0x0E Undefined instruction exception
 
Lots of things I did in 2025:

* Continuing to reverse engineering and reimplementing IOP modules
* Looking into other hardware (e.g. DESR, S147/148, WEGA HVX)
* Some optimizations and documentation changes in ps2sdk
* More work in ps2dev projects to make it easier to build and less likely to error
* Improvements in PS2 Dev Wiki

Work on the base projects will continue such that working on projects that build on top of it, like wLE, OPL, Neutrino, etc. will become much easier and less annoying.

I would like to focus on debugging tooling (e.g. DECI2, dsnet, RDB) such that agent-based tools can call them, making debugging less time consuming.
 
Interesting project: https://www.yyzkevin.com/picopcmcia/

I messaged the author and found out a few things:
* With TI KS384 bus switches, the data lines and address lines are multiplexed.
* Due to missing bus transceivers/buffers, for receiving/reading data 32-bit wide DMA is questionable (in 32-bit wide DMA, the lower 16 bits of the address lines become data lines)
* Flash device and PIO ATA device from SPEED should be possible
* microSD/TF card is SPI only (no 4 bit SDIO)
 
You must log in or register to reply here.

Similar threads

Back
Top