PS2 [MX4SIO/SIO2SD] SD Card Adapter and SD-driver for the PS2 SIO2 interface

I would be careful with such operations, as any data transfer (that isn't done while transferring sectors) is taken as a command. So if you are sending data of 0x00, then you are just sending command 0 (GO_IDLE_STATE) multiple times.
Instead you have to carefully determine which command makes the card go in this undetermined state and find a way to exit it.

The other thing to consider is how CMD0 is implemented. As any other command, it has 4 bytes of argument. If each of them is also considered a CMD0, then sending any number of 0x00 bytes should be OK. But if this is not the case, and the 4 bytes of argument must all be sent and are never considered another command(s), or anything within that period is considered only an argument, then we have a problem. And in that case the number of dummy bytes must be a multiple of 5 + the length of CMD0 response. This also brings the question of how polling for response is done and if "reading" more bytes after that is like sending CMD0 (when sending 0x00). My tests show that sending any number of 0x00 bytes is not causing any problems, at least on some SD cards. Still I would like to avoid that.

There is also the question of how the /CS interruptions are treated. Because it could be that a command can only start after a /CS high to low. But this seems not to be the case.
It might be that when an /CS interruption happens within the argument bytes of CMD0, those are treated as potential commands, but this is not the case for other commands. This would explain how after an arbitrary number of 'dummy' bytes transferred commands can still be sent.
If somebody can find how the above things are specified in the SD Card specs, I would be thankful.

I believe that may have to do with the way the polling for response is done. But the latest code you are using is always working in single byte chunks, so this shouldn't be a problem, unless the problem is just that - interrupting /CS in the middle of commands/responses.
Still I think it *might* be that the cause is some missed transfer - like forgetting to read/write the CRC bytes after the transfer of a sector. So check if that is always done (AFAIK the checksum is always transferred, even if disabled).
Also check if you are transferring sectors fully - for example if you are transferring less than the set amount. And also you can try testing with reduced number of dummy bytes, until it starts failing again to determine the necessary minimum and if that needs to be multiple of anything (which is unlikely).

EDIT: I got confused above - each command is OR-ed with 0x40 (the highest two bits are always 01), so sending 0x00 is not sending any command. This solves the above questions mostly.
Still, @Maximus32 you should determine which command is creating the need for transferring those dummy bytes.
I don't remember if the specification states that such zero bytes can be sent at any time, but I guess doing that is harmless.

EDIT2: Maybe the required initial dummy cycles should be of 0x00, rather than the initialization command.
 
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I did some tests and it is very irritating for me. I will call the first version of test_bdm "v1", the version with speed test "v2" (2 weeks ago) and the version from 3 days ago "v3".

The beginning is always the same, which is why I ignored it. But I noticed that with PS2Link v1.24 the beginning is:
Code:
ps2client -h 192.168.0.10 execee host:test_bdm.elf
loadelf: fname host:test_bdm.elf secname all
Input ELF format filename = host:test_bdm.elf
0 00100000 00037da8 ....
1 001905fc 00000004 .
Loaded, host:test_bdm.elf
start address 0x1000d8
gp address 00000000
BDM (Block Device Manager) test application
Loading iomanX and fileXio IOP modules
fileXio: fileXio RPC Server v1.00
Copyright (c) 2003 adresd
Block Device Manager (BDM) v1.1
BDM: connecting fs MBR
BDM: BDM event thread running
FreeUsbd v.0.1.2
USBMASS: USB MASS Driver v1.1
sdCard v1.1

And with PS2Link 1.60 it is ...
Code:
ps2client -h 192.168.0.10 execee host:test_bdm.elf
loadelf: fname host:test_bdm.elf secname all
Input ELF format filename = host:test_bdm.elf
0 00100000 00037da8 ....
1 001905fc 00000004 .
Loaded, host:test_bdm.elf
start address 0x1000d8
gp address 00000000
BDM (Block Device Manager) test application
Loading iomanX and fileXio IOP modules
fileXio: fileXio RPC Server v1.00
Copyright (c) 2003 adresd
Loading BDM IOP modules            <-- missing with PS2Link 1.24
Block Device Manager (BDM) v1.1
BDM: connecting fs MBR
BDM: BDM event thread running
FreeUsbd v.0.1.2
USBMASS: USB MASS Driver v1.1
sdCard v1.1
The line "Loading BDM IOP modules" was missing with PS2Link 1.24. This is indepenend from the version of test_bdm. And this is the reason why it didn't work for me.

In the following I will omit the beginning. And I only use PS2Link v1.60

Not compatible (all versions of test_bdm):
- µSD SandDisk Ultra 32 GB Class 10
- µSD Toshiba 4 GB Class 4

Compatible:
- µSD Toshiba Exceria 32 GB UHS3
- µSD Toshiba Exceria 64 GB UHS3

I tested both cards on a PS2 v7 and v15.

PS2 v7 | 32 GB | test_bdm v2
Code:
 ERR: CMD 0  RSP FF  -> CMD 0 doesn't receive response soon on some cards, so th
is error is normal, if there are no errors after this point.
 done 166 passes
 Detected SD ver.2+ card
 SD ver.2+ Block address
 Card successfully initialized.
 CSD reg:
 CSD ver 2 BDM: connecting device sdc0p0
Init done
BDM: connecting device sdc0p1
BDM: sdc0p0 mounted to MBR
BDM VFAT driver (FAT12/16/32) v1.1
BDM: connecting fs vfat
VFAT: Fat type 32 Id FAT32
BDM: sdc0p1 mounted to vfat
Wait 5s for drives

Listing files in mass0:
...
-------rwx Thu Jun 11 12:28:24 2020 16777216 zero.bin

Starting speed test on mass0:zero.bin...
Read 1024KiB in 5870ms, blocksize=64, speed=178KB/s
Read 1024KiB in 4056ms, blocksize=128, speed=258KB/s
Read 1024KiB in 2444ms, blocksize=256, speed=429KB/s
Read 1024KiB in 1510ms, blocksize=512, speed=694KB/s
Read 1024KiB in 1125ms, blocksize=1024, speed=932KB/s
Read 1024KiB in 932ms, blocksize=2048, speed=1125KB/s
Read 1024KiB in 832ms, blocksize=4096, speed=1260KB/s
Read 1024KiB in 780ms, blocksize=8192, speed=1344KB/s
Read 1024KiB in 751ms, blocksize=16384, speed=1396KB/s
Read 1024KiB in 743ms, blocksize=32768, speed=1411KB/s
Done. Exit in 5s

PS2 v7 | 32 GB | test_bdm v3
Code:
ps2_spi_set_speed(400000)
ps2_spi_set_speed(25000000)
SIO2SD: 33554432 512-byte logical blocks: (17180MB / 16384MiB)
BDM: connecting device sdc0p0
Init done
BDM: connecting device sdc0p1
BDM: sdc0p0 mounted to MBR
BDM VFAT driver (FAT12/16/32) v1.1
BDM: connecting fs vfat
VFAT: Fat type 32 Id FAT32
BDM: sdc0p1 mounted to vfat
Wait 5s for drives

Listing files in mass0:
...
-------rwx Thu Jun 11 12:28:24 2020 16777216 zero.bin

Starting speed test on mass0:zero.bin...
Read 1024KiB in 11249ms, blocksize=64, speed=93KB/s
Read 1024KiB in 8980ms, blocksize=128, speed=116KB/s
Read 1024KiB in 7400ms, blocksize=256, speed=141KB/s
Read 1024KiB in 6518ms, blocksize=512, speed=160KB/s
Read 1024KiB in 6126ms, blocksize=1024, speed=171KB/s
Read 1024KiB in 5925ms, blocksize=2048, speed=176KB/s
Read 1024KiB in 5825ms, blocksize=4096, speed=180KB/s
Read 1024KiB in 5773ms, blocksize=8192, speed=181KB/s
Read 1024KiB in 5739ms, blocksize=16384, speed=182KB/s
Read 1024KiB in 5728ms, blocksize=32768, speed=183KB/s
Done. Exit in 5s

PS2 v15 | 32 GB | test_bdm v3
Code:
ps2_spi_set_speed(400000)
ps2_spi_set_speed(25000000)
SIO2SD: 33554432 512-byte logical blocks: (17180MB / 16384MiB)
BDM: connecting device sdc0p0
Init done
BDM: connecting device sdc0p1
BDM: sdc0p0 mounted to MBR
BDM VFAT driver (FAT12/16/32) v1.1
BDM: connecting fs vfat
VFAT: Fat type 32 Id FAT32
BDM: sdc0p1 mounted to vfat
Wait 5s for drives

Listing files in mass0:
...
-------rwx Thu Jun 11 12:28:24 2020 16777216 zero.bin

Starting speed test on mass0:zero.bin...
Read 1024KiB in 9918ms, blocksize=64, speed=105KB/s
Read 1024KiB in 7763ms, blocksize=128, speed=135KB/s
Read 1024KiB in 6519ms, blocksize=256, speed=160KB/s
Read 1024KiB in 5771ms, blocksize=512, speed=181KB/s
Read 1024KiB in 5457ms, blocksize=1024, speed=192KB/s
Read 1024KiB in 5300ms, blocksize=2048, speed=197KB/s
Read 1024KiB in 5230ms, blocksize=4096, speed=200KB/s
Read 1024KiB in 5178ms, blocksize=8192, speed=202KB/s
Read 1024KiB in 5164ms, blocksize=16384, speed=203KB/s
Read 1024KiB in 5159ms, blocksize=32768, speed=203KB/s
Done. Exit in 5s

PS2 v15 | 64 GB | test_bdm v2
Code:
 ERR: CMD 0  RSP FF  -> CMD 0 doesn't receive response soon on some cards, so th
is error is normal, if there are no errors after this point.
 done 281 passes
 Detected SD ver.2+ card
 SD ver.2+ Block address
 Card successfully initialized.
 CSD reg:
 CSD ver 2 BDM: connecting device sdc0p0
Init done

 SIO2 extr transf comp timeout BDM: connecting device sdc0p1
BDM: sdc0p0 mounted to MBR

 SIO2 extr transf comp timeout
 SIO2 extr transf comp timeout BDM VFAT driver (FAT12/16/32) v1.1
BDM: connecting fs vfat

 SIO2 extr transf comp timeout
 SIO2 extr transf comp timeout VFAT: Fat type 32 Id FAT32
BDM: sdc0p1 mounted to vfat

 SIO2 extr transf comp timeout
 SIO2 extr transf comp timeout Wait 5s for drives

Listing files in mass0:
-------rwx Thu Jun 11 12:28:24 2020 16777216 zero.bin

Starting speed test on mass0:zero.bin...

 SIO2 extr transf comp timeout
 SIO2 extr transf comp timeout
 SIO2 extr transf comp timeout
 SIO2 extr transf comp timeout
 SIO2 extr transf comp timeout
 SIO2 extr transf comp timeout
 SIO2 extr transf comp timeout
 SIO2 extr transf comp timeout
 SIO2 extr transf comp timeout
 SIO2 extr transf comp timeout
 SIO2 extr transf comp timeout
 SIO2 extr transf comp timeout
 SIO2 extr transf comp timeout
 SIO2 extr transf comp timeout
(aborted by me)

PS2 v15 | 64 GB | test_bdm v3
Code:
ps2_spi_set_speed(400000)
ps2_spi_set_speed(25000000)
SIO2SD: 33554432 512-byte logical blocks: (17180MB / 16384MiB)
BDM: connecting device sdc0p0
Init done
BDM: connecting device sdc0p1
BDM: sdc0p0 mounted to MBR
BDM VFAT driver (FAT12/16/32) v1.1
BDM: connecting fs vfat
VFAT: Fat type 32 Id FAT32
BDM: sdc0p1 mounted to vfat
Wait 5s for drives

Listing files in mass0:
-------rwx Thu Jun 11 12:28:24 2020 16777216 zero.bin

Starting speed test on mass0:zero.bin...
Read 1024KiB in 10455ms, blocksize=64, speed=100KB/s
Read 1024KiB in 8046ms, blocksize=128, speed=130KB/s
Read 1024KiB in 6854ms, blocksize=256, speed=152KB/s
Read 1024KiB in 6056ms, blocksize=512, speed=173KB/s
Read 1024KiB in 5744ms, blocksize=1024, speed=182KB/s
Read 1024KiB in 5587ms, blocksize=2048, speed=187KB/s
Read 1024KiB in 5513ms, blocksize=4096, speed=190KB/s
Read 1024KiB in 5463ms, blocksize=8192, speed=191KB/s
Read 1024KiB in 5450ms, blocksize=16384, speed=192KB/s
Read 1024KiB in 5445ms, blocksize=32768, speed=192KB/s
Done. Exit in 5s

Then I tested a N-MOSFET between the resistor on ACK and GND. It works. If the Gate is low the output of test_bdm is the same as without a SD card. So I will add the transistor into the new PCB design.
 
(I copied it from Discord, because TnA surely wants me to post it here, too)

I made a 3D model of a case. I'll print it on monday.

2020_06_12_mx4sio_case_01.png

2020_06_12_mx4sio_case_02.png

2020_06_12_mx4sio_case_03.png


Is it necessary that the PCB fits into the original case further on? I think in summary it is cheaper printing the case than buying an original card and then edit it. If thousends of people do this, the price of the original MCs may increase, what's bad for poor countrys. The next problem is that there are two different cases what makes it a little more difficult to make the PCB fit into both. If we give it up, the PCB is much easier and all other disadvantages disappear. And if someone doesn't have the ability to print the case, he won't have the ability to make the PCB either. So if he buy the PCB, he can buy it combined with the printed case.

What do you think?

(And please don't be too hard on me, 3D design is not my strong skill)
 
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Getting this to work is a lot more difficult then I expected, plus I don't have much time to work on this project. The code that worked 2 years ago is no longer working bug-free. I can get a list of games in OPL, but that's it right now.

I do have some good news though. The longer I'm experimenting with the sio2sd driver, the more I'm starting to appreciate the speed of the original driver by @wisi. So I've done some more tests with the original driver. I'm now doing the tests from the IOP, and reading from the block device without the fat32 filesystem in between. The results look promising once again, and should give an idea of the current upper-bound:
Code:
Start reading 'sdc0p0' block device:
Read 1024KiB in 1632ms, blocksize=512, speed=642KB/s
Read 1024KiB in 1095ms, blocksize=1024, speed=957KB/s
Read 1024KiB in 836ms, blocksize=2048, speed=1254KB/s
Read 1024KiB in 706ms, blocksize=4096, speed=1485KB/s
Read 1024KiB in 642ms, blocksize=8192, speed=1633KB/s
Read 1024KiB in 620ms, blocksize=16384, speed=1691KB/s
Read 1024KiB in 598ms, blocksize=32768, speed=1753KB/s
Read 1024KiB in 590ms, blocksize=65536, speed=1777KB/s
Read 1024KiB in 584ms, blocksize=131072, speed=1795KB/s
 
Yeeeehaaaaa, up to 1.8MB/s!

~1.3MB/s is enough for fluid FMVs!

We should definitely suggest the users to use 4KB-Clusters or bigger clusters!
 
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MPEG2 max. bandwidth on DVD is 10.08MBit/s... Yes, I am sure...

...and the Bitrate of both (GT3&GT4) is below that!
 
What is max transfer speed that you able to obtain\receive through SMB in OPL?
~2\3 MB/s?
These games FMVs work fluidly through HDD.
I never seen that someone had fluid FMV for these games through SMB.
 
Then try a dedicaded device and not a PC.

The Bitrate of them is ~8.5MBit/s AFAIR...
I think GT3 even had a higher CBR than GT4.

If they stutter, it might be due to the IOP being a bottleneck and Samba being quite CPU-Heavy.


The adapter will use pretty much as many CPU-Cycles for the transfer like USB does, so CPU-Overload should not be of a concern there.
 
No... You get 8.5MByte/s with HDL GI...

With the adapter, theoretical max. is ~3MB/s AFAIK, but it makes some "pauses", hence ~1.8MB/s is probably very close to the max.
 
You wont get 8.5MB/s in OPL for SMB.
Yes my results are from HDLGameInstaller.
I even uploaded picture in my previous post.
 
I never said you will...

I simply wrote, that the Bitrate of the FMVs in GT3 are ~8.5MBit/s (a.k.a. ~1.06 MB/s) and you somehow brought HDL GI into play and conflated MBit/s with MB/s... (FMV CBR ~8.5MBit/s vs. HDL GI Installation-speed ~8.5MByte/s... 8 times as much and yet totally unrelated to the adapter)

It has nothing to do with the topic and you brought it up for IDK which reason, lol.


I even wrote WHY you won't get that speed in-game...
CPU-Load (a.k.a. running at 100% used execution-cycles)!

...and that reason is NOT present for the adapter, but solely for "Samba", because that needs a lot CPU-Cycles...

Hence, ~1.3MB/s probably can be achieved in-game and hence FMVs should be fluid in all games (except if there is a bug in the Loader, or whatever causes issues).
 
Yeeeehaaaaa, up to 1.8MB/s!

~1.3MB/s is enough for fluid FMVs!

Are you sure?
I remember that even through SMB (PS2 <-> PC) I still have a problem with smooth FMVs in GT3\GT4...
This transfer speed requires 100% CPU load. During this relatively slow transmission, the CPU is constantly "busy waiting" for the next bytes to arrive. This gives the best transfer speed, but also the worst CPU load. For example: during this test it looks like the application is crashed, becouse there is no debug output. But after the test is done, suddenly all lines are printed at once. This is becouse the CPU is 100% working on the transfer and has no time to send the debug messages.
Immagine instead of debug messages this is the FMV sound. Then sound would not be able to play, or the FMV would stutter. Even though there is enough raw speed, there's not enough CPU time left to play it.

Busy waiting loops are bad in any case, but especially when interrupts are disabled. It will cripple not just the slow IOP, but even the fastest CPU's.

To fix this I would like the whole transfer to use DMA and interrupts. At the DMA completion interrupt the next transfer could be started. The byte reversing could be done from the thread that is waiting for the data. If data arrives in 256byte blocks, then the byte reversing could be done at the same time. For instance when transferring 2KiB the transfer would look like so:
Code:
DMA transfer block 1  IOP idle
DMA transfer block 2  IOP convert block 1
DMA transfer block 3  IOP convert block 2
DMA transfer block 4  IOP convert block 3
DMA transfer block 5  IOP convert block 4
DMA transfer block 6  IOP convert block 5
DMA transfer block 7  IOP convert block 6
DMA transfer block 8  IOP convert block 7
DMA idle              IOP convert block 8
Assuming the DMA transfers can be done at the maximum speed the hardware allows, the only slowdown of this approach would be the last 256bytes to be converted. Compared to the polling approach this would result in a maximum slowdown of 1/8 the polling speed when transferring 2KiB. However most transfers seem to be in the range of 8 to 32KiB resulting in an even smaller slowdown. If however this approach also results in the CPU load dropping from 100% to 40% it could improve the overall performance of the IOP greatly.
 
Isn't FMV sound usually interleaved with the video stream?
I seriously doubt DMA would help in any way or get even comparable speeds. I think I tested and the results were not good, furthermore considering that we should try not to use DMA if possible, so that we don't overcomplicate the saving/restoring of the SIO2 state for SIO2MAN to use. Which also reminds me the real reason why interrupts are disabled - because we *really* don't want SIO2MAN interrupting the SD Card transfer. If you want to add periods when the IOP can resume running other modules, them maybe interrupts can be re-enabled midway the transfer and then switch threads somehow... but this seems unsafe (and coding that seems very difficult to me).

Though it is a matter of how big block of data the game requests at a time. Still your concern makes sense as the EE would be sending sound back to the IOP (or instruct the IOP where to get it from), which to send it to the SPU2.
So the real question will be - how well will it fair with different games?! Which is something I am very curious about too, because for some reason, your OPL with the SD Card driver (from the psx-scene thread) did not work on my PS2 and the game I tested (so I never saw it myself). :) (I can't wait to try it actually!)

I think the actual transfer of data should be OK the way it is. What can be improved is the busy loop while waiting for the card to be ready with the data to be read. Maybe other tasks can be ran in that time, although I am fairly certain that that period is very short for modern, fast cards and using it for something else won't help much.

This reminds me of when SP193 was changing the HDD driver (if I remember correctly) between busy-polling and waiting for an interrupt when the data transfer is ready. What turned-out was that the IOP was so slow, and its interrupt-handler and thread switching is also so slow (long code), that the busy-polling worked faster.

Do you have OPL code that works with the SD Card driver (any version of it) so I can do tests with it?
 
I seriously doubt DMA would help in any way or get even comparable speeds. I think I tested and the results were not good, furthermore considering that we should try not to use DMA if possible, so that we don't overcomplicate the saving/restoring of the SIO2 state for SIO2MAN to use. Which also reminds me the real reason why interrupts are disabled - because we *really* don't want SIO2MAN interrupting the SD Card transfer. If you want to add periods when the IOP can resume running other modules, them maybe interrupts can be re-enabled midway the transfer and then switch threads somehow... but this seems unsafe (and coding that seems very difficult to me).
There is another way to prevent sio2man from interrupting the transfer. Calling sio2_pad_transfer_init will lock sio2man for our use. Calling sio2_transfer_reset will unlock sio2man. This is what I was using in my latest attempts to make the sio2sd driver compatible with sio2man, without the need to disable interrupts. This works perfectly with sio2man from ps2sdk, but it did not work with ROM0:SIO2MAN.
Why do you think DMA transfers are slower than PIO transfers? Or do you mean the byte reversing will take more time when processed in a separate task?

Though it is a matter of how big block of data the game requests at a time. Still your concern makes sense as the EE would be sending sound back to the IOP (or instruct the IOP where to get it from), which to send it to the SPU2.
Exactly my point. The IOP has more things to do than handling 1 driver. The current programming model I see in almost all IOP drivers is to fully claim all CPU time in favor of the speed for that 1 driver. The result however is that an application composed of many IOP drivers will always be slow.
For instance an application like uLE that can copy files from HDD to SD. If both drivers only perform well with 100% CPU load, then having 2 drivers copy files would result in terrible performance.

So the real question will be - how well will it fair with different games?! Which is something I am very curious about too, because for some reason, your OPL with the SD Card driver (from the psx-scene thread) did not work on my PS2 and the game I tested (so I never saw it myself). :) (I can't wait to try it actually!)
Do you have OPL code that works with the SD Card driver (any version of it) so I can do tests with it?
This is the code of the old driver. It worked with a reasonable game compatibility for both USB and sio2sd. The codebase is old and no longer compiles:
https://gitlab.com/ps2max/Open-PS2-Loader/-/tree/bdm

This is my work-in-progress branch:
https://gitlab.com/ps2max/Open-PS2-Loader/-/tree/bdm-2020
Compiling it with 'make DEBUG=1 IOPCORE_DEBUG=1 clean run'. I cannot get the USB version to properly boot a game, which is the first problem. With lots of trying I can get 1 or 2 games booting. I don't know what changed in the last 2 years that is cousing this problem.
With sio2sd I can only get a list of games to show. I'm also noticing the entire UI is stuck while loading the game list. This is probably caused by the 100% CPU load (controllers not responding?).

This reminds me of when SP193 was changing the HDD driver (if I remember correctly) between busy-polling and waiting for an interrupt when the data transfer is ready. What turned-out was that the IOP was so slow, and its interrupt-handler and thread switching is also so slow (long code), that the busy-polling worked faster.
I've already proven that theory incorrect. The fastest PS2 HDD driver is this one:
https://github.com/rickgaiser/linux-firmware-ps2/tree/master/pata_ps2
https://github.com/rickgaiser/linux-firmware-ps2/tree/master/dev9_dma
100% DMA + interrupt driven. 0 busy waiting, 0 thread switching, and near 0% CPU load. For ps2linux this driver gave over 40MB/s speed (near the UDMA66 practical limit). The data did not only have to go from the HDD to the IOP, but also from the IOP to the EE. So the total memory bandwidth was over 80MB/s, near the IOP memory bandwidth limit.

For the sio2sd driver (and actually all data transfer drivers) I would like to do the same thing. Unfortunately the sio2sd driver needs to reverse the bits it receives, so some cpu load is needed. But still, 100% CPU load for less than 2MB/s transfer speed is terrible, even for the IOP.
 
I just did a short test on how fast the IOP can do the bit reversing. I must admit I was hoping the IOP to be faster at this seemingly easy task. I've tested the existing functions and the results are:

NOTE: These are NOT SD transfer speeds!
Code:
// 2200KB/s on a FAT PS2
while (size8--) {
*buffer8 = reverseByte(*buffer8);
buffer8++;
}

// 3200KB/s on a FAT PS2
while (size16--) {
*buffer16 = reverseByteInHalf(*buffer16);
buffer16++;
}

// 4500KB/s on a FAT PS2
while (size32--) {
*buffer32 = reverseByteInWord(*buffer32);
buffer32++;
}

The functions seem to be optimized in assembly already. But if we would do DMA transfers, it would be possible to process the data in blocks instead of per 8/16/32bits. This would allow initialization to be moved out of the loop. The results are:
Code:
void reverseBuffer32(u32 * buffer, u32 count, u32 maskF, u32 mask3, u32 mask5)
{
  u32 n;

  while (count--) {
    n = *buffer;
    n = ((n & (maskF <<4)) >>4) | ((n & maskF) <<4);
    n = ((n & (mask3 <<2)) >>2) | ((n & mask3) <<2);
    n = ((n & (mask5 <<1)) >>1) | ((n & mask5) <<1);
    *buffer = n;
    buffer++;
  }
}

//  6765KB/s (FAT  PS2, with -O3)
// 11650KB/s (slim PS2, with -O3)
reverseBuffer32(buffer32, size32, 0x0F0F0F0F, 0x33333333, 0x55555555);
Note1: This is C code, but I've checked the assembly code to make sure it's optimized, it is when using -O3.
Note2: There's a huge difference in speed between a FAT and a slim PS2. Almost double the speed!

So in theory, if the SD card can transfer at 1.8MB/s, and the FAT IOP can convert the data at 6.75MB/s. This would result in a CPU load of around 27%. For a slim ps2 the CPU load would be around 16%.

Assuming the DMA controller can provide 1.8MB/s data this sounds like a promising solution. If only I had the time to build and test it ;).
 
There is another way to prevent sio2man from interrupting the transfer. Calling sio2_pad_transfer_init will lock sio2man for our use. Calling sio2_transfer_reset will unlock sio2man. This is what I was using in my latest attempts to make the sio2sd driver compatible with sio2man, without the need to disable interrupts. This works perfectly with sio2man from ps2sdk, but it did not work with ROM0:SIO2MAN.

SIO2MAN from the PS2SDK was based on XSIO2MAN.

I've already proven that theory incorrect. The fastest PS2 HDD driver is this one:

It wasn't my idea; the original DEV9 module from Sony did it that way. When I reverted the homebrew change back to the original design, I did get better performance.

With respect, your modules work totally differently from the official ones; the official module has requests always issued from a thread on the IOP, while you have a request queue that is used to initiate new requests from the interrupt context itself - which is clearly faster.

Isn't FMV sound usually interleaved with the video stream?

Even if it is, the stream has to be split into sound and video, with the sound data going over to the IOP and the video stream staying on the EE.
 
The problem with the ps2 slim is that the reading speed of the usb is too slow, this memory card has a reading speed sufficient to overcome this problem from what I read, is it so?
And what do you think you can connect a USB device through the memory card?
 
By the time you add all those devices on the memory card slot it will become too complicated and put too much weight on the memory card slot.

Since the SD card and the memory card slot both have a serial interface, it is easier to write the software for it on the PS2 side than other types of devices.
 

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