XDR utilise la même
table de fréquences que CELL, mais avec un décalage NVS différent (0x312C et 0x312D). Par exemple, un overclocking XDR à 3,8 GHz serait :
w 312c 02 11
Ok, dont see this on the repo. My bad I guess... w 312 XX X is a mullion command? What the sherwood entry (I test essentially on sherwood)? Thank you very much. If I follow the github I see w 63 but this is the command for the cell or w 61 but that is for the XDR timing. Last question, you dont have the corrected firmware on 4.93? All my PS3 are on 4.93.
EDIT1: finding how activate QA flag but 4.93 version will be fine!
EDIT2: Currently, the best I can achieve is
4 GHz (test on 20XX) with the patched CFW (seem be perfectly OK). Starting at
4.1 GHz, the console no longer boots, even when I increase the CELL voltage. If I understand correctly, this is probably because the frequency gap between the
CELL and its
XDR memory becomes too large. In that case, I would really need access to the
Sherwood command to address this issue.
EDIT3: Indeed, after testing (and search on the discord), the command for the XDR frequency on Sherwood is
w 61 XX XX (I have trying 3.9GHZ). I was therefore able to boot at
4.2 GHz (by increasing the CELL voltage). At this point, I'm a bit lost: what is the Sherwood command used to optimize the memory timings (
tRC)?
I was convinced it was also
w 61 XX...
For reference, the following command is provided for Mullion:
tRC = 21: w 3160 51 70 (byte0: 010100|01) - STABLE (best confirmed)
EDIT4: First test on Skyrim @4.256GHZ, it's incredible! No more FPS drop when I'm runing in city.
EDIT5: First stabilised setup on SLIM 20XX with the modified CFW: CELL @ 4.256GHZ @ 1.15V & XDR @ 4GHZ (used new game start on skyrim for test stability, crashed under this value). I confirm thaht Skyrim is really a CELL limited game. Intro sequence have 30 FPS stable.
EDIT6: CELL @ 4.4GHZ and XDR @ 4.2GHZ need 1.2V. Starting to need delid CELL at this point, need 54% fan for stay under 60° (with direct fan case mod).
EDIT7: 4.5 GHZ demand 1.3V and 4.7GHZ (max reached) demand 1.35V, after this limit I cant reach more. 4.4GHZ seem to be the sweet spot.
Just a quick note to let you know that, in the end, there is no command on Sherwood to adjust XDR timings.
If you happen to come across this thread, you'll be glad to know it if, like me, you've been searching for it for quite a while.
According to Nascar, it wouldn't provide any benefit anyway when running overclocked CELL values, and would only make a difference at stock CELL clocks. It's easy to understand why: if I significantly increase the XDR memory frequency, that's likely to have a much greater impact than tweaking a few memory timings.
Nascar has offered to compile a 4.93 CFW with the corrected clock values when he has some free time. So if you're waiting for that, a little patience - I imagine he'll post it here when it's ready.
Once again, thanks to the whole team. It's genuinely fascinating to follow all of this.
